Autores
Gallegos García Gina
Título Performance Evaluation of Block Cipher Algorithms Implementations in ARM Architecture
Tipo Congreso
Sub-tipo Memoria
Descripción 4th IEEE International Conference on Electrical, Computer, and Energy Technologies, ICECET 2024
Resumen Since the arrival of devices connected to the Internet, cryptographic goals have become a constant challenge for cybersecurity specialists. Data transmitted between IoT devices can become sensitive depending on the application scenario, which makes it necessary to consider efficient algorithmic implementations if they are used to achieve cryptographic goals on such constrained resource devices. This article presents a performance evaluation of different implementations of block cipher algorithms in devices with ARM architecture. For this purpose, the block encryption algorithms AES, 3DES, CAST5, RC2, Blowfish, Camellia, and SM4 were considered in the 5 modes of operation for confidentiality: ECB, CBC, OFB, CFB and CTR. Our results indicate to us that the AES, Blowfish, and Camellia implementations are the fastest for encrypting and decrypting, with Camellia being the implementation that requires the least amount of memory. In contrast, 3DES and RC2 show slower implementations and higher memory consumption, which makes it possible to suggest implementations of the AES and Camellia algorithms for use in IoT ecosystems. © 2024 IEEE.
Observaciones DOI 10.1109/ICECET61485.2024.10698142
Lugar Syndey
País Australia
No. de páginas
Vol. / Cap.
Inicio 2024-07-25
Fin 2024-07-27
ISBN/ISSN 9798350395914